Xilinx Zynq-7000 Design Guide

Zynq-7000 PCB Design Guide www.xilinx.com 51
UG933 (v1.8) November 7, 2014
Chapter 5
Processing System (PS) Power and
Signaling
Power
Zynq-7000 AP SoC devices are divided into several power domains. Figure 5-1 shows an
overview of those domains.
Main Power Supplies
V
CCPINT
– PS Internal Logic Supply
V
CCPINT
is a 1.0V nominal supply that powers all of the PS internal logic circuits. This supply
can be combined with V
CCINT
if the system does not require the PL supply to be powered
down independent of the PS.
V
CCPAUX
– PS Auxiliary Logic Supply
V
CCPAUX
is a 1.8V nominal supply that powers all of the PS auxiliary circuits. One of the
0.47 µF capacitors must have less than a 200 mil (5.1 mm) total PCB trace length from the
X-Ref Target - Figure 5-1
Figure 5-1: Power Domains
UG933_c5_01_051212
VCCPAUX
VCCPLL
VCCPINT
Processing System (PS)
V
CCO_MIO0 VCCO_DDR VCCO_MIO1
VCCAUX
VCCINT
Programmable Logic (PL)
V
CCO0 VCCO1 VCCOn
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Xilinx Zynq-7000 Specifications

General

Series	Zynq-7000
Number of Cores	Dual-core
Processor Speed	Up to 1 GHz
Device Type	SoC
Logic Cells	Up to 350K
DSP Slices	Up to 900
External Memory Interfaces	DDR3, DDR2, LPDDR2
I/O Standards	LVCMOS, HSTL, SSTL
Operating Temperature	-40°C to +100°C (Industrial), 0°C to +85°C (Commercial)
Package Options	Various BGA packages
I/O Voltage	3.3V