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Xilinx Zynq-7000 Design Guide

Xilinx Zynq-7000
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Zynq-7000 PCB Design Guide www.xilinx.com 14
UG933 (v1.8) November 7, 2014
Chapter 3: Power Distribution System
Table 3-2 lists the decoupling requirements for the Processing System (PS).
FFG1156 Z-7100 3 0 0 2 0 2 0 4 8 1 0 0 1 0 0 1 0 0 1
Notes:
1. PCB Capacitor specifications are listed in Table 3-3.
2. Total includes all capacitors for all supplies, except for the MGT supplies MGTAVCC and MGTAVTT, which are covered in
UG476
, 7 Series FPGAs GTX/GTH Transceivers User Guide and UG482, 7 Series FPGAs GTP Transceivers User Guide.
3. HRIO 47 µF capacitors can be consolidated at one 47 µF per four banks.
4. HPIO 47 µF capacitors can be consolidated at one 47 µF per four banks.
5. Decoupling capacitors cover down to approximately 100 Hz.
Table 3-1: Required PCB Capacitor Quantities per Device (PL)
Package Device
V
CCINT
V
CCBRAM
V
CCAUX
V
CCAUX_IO
V
CCO
per Bank
(3)(4)
Bank 0
680
µF
330
µF
100
µF
4.7
µF
0.47
µF
100
µF
47
µF
4.7
µF
0.47
µF
47
µF
4.7
µF
0.47
µF
47
µF
4.7
µF
0.47
µF
47 µF
or
100 µF
4.7
µF
0.47
µF
47
µF
Table 3-2: Required PCB Capacitor Quantities per Device (PS)
Package Device
V
CCPINT
V
CCPAUX
(1)
V
CCO_DDR
V
CCO_MIO0
V
CCO_MIO1
V
CCPLL
(2)(3)
100
µF
4.7
µF
0.47
µF
100
µF
4.7
µF
0.47
µF
100
µF
4.7
µF
0.47
µF
100
µF
4.7
µF
0.47
µF
100
µF
4.7
µF
0.47
µF
CLG225 Z-701011311111 4 111111
CLG400 Z-701011311111 4 111111
CLG485 Z-7015 1 1 3 1 1 1 1 1 4 1 1 1 1 1 1
CLG400 Z-7020 1 1 3 1 1 1 1 1 4 1 1 1 1 1 1
CLG484 Z-7020 1 1 3 1 1 1 1 1 4 1 1 1 1 1 1
SBG485Z-703010011110 0 111111
FBG484/
RB484
Z-703010011110 0 111111
FBG676 Z-703010011110 0 111111
FFG676/
RF676
Z-703010011110 0 111111
FBG676
Z-7035
10011110 0 111111
FFG676/
RF676
Z-7035
10011110 0 111111
FFG900/
RF900
Z-7035
10011110 0 111111
FBG676Z-704510011110 0 111111
FFG676/
RF676
Z-704510011110 0 111111
FFG900/
RF900
Z-704510011110 0 111111
FFG900Z-710010011110 0 111111
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Xilinx Zynq-7000 Specifications

General IconGeneral
SeriesZynq-7000
Number of CoresDual-core
Processor SpeedUp to 1 GHz
Device TypeSoC
Logic CellsUp to 350K
DSP SlicesUp to 900
External Memory InterfacesDDR3, DDR2, LPDDR2
I/O StandardsLVCMOS, HSTL, SSTL
Operating Temperature-40°C to +100°C (Industrial), 0°C to +85°C (Commercial)
Package OptionsVarious BGA packages
I/O Voltage3.3V

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