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ABB ACSM1 - Rtrig

ABB ACSM1
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Standard function blocks
326
Operation The output (Q1) is 0 if the set input (S) is 1 and the reset input (R) value is 0. The output
will retain the previous output state if the set input (S) and the reset input (R) are 0. The
output is 0 if the set input is 0 and the reset input is 1.
Truth table:
Inputs Set input (S): Boolean
Reset input (R): Boolean
Outputs Output (Q1): Boolean
RTRIG
(10031)
Illustration
Execution time 0.38 µs
Operation The output (Q) is set to 1 when the clock input (CLK) changes from 0 to 1. The output is
set back to 0 with the next execution of the block. Otherwise the output is 0.
Note: The output is 0 after cold restart and after the first execution of the RTRIG block.
Otherwise the output is 1, when the clock input is 1.
Inputs Clock input (CLK): Boolean
Outputs Output (Q): Boolean
SRQ1
previous
Q1
000 0
001 1
010 0
011 0
100 1
101 1
110 0
111 0
Q
previous
is the previous cycle output value.
RTRIG
47
TLA1 1 msec (1)
>CLK
Q
Q(47)
CLK
previous
CLK Q
000
011
100
110
CLK
previous
is the previous cycle output value.

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