Eaton EMR-3MP0 - Available Gates (Operators)

LE
LogicMain_E02
LE = LE[1]...[n]
LE .
IN1
No assignment
1..n, Assignment List
LE .
Inverting1
Active
Inactive
XOR
Gate
AND
OR
NAND
NOR
AND
OR
NAND
NOR
LE .
IN2
No assignment
1..n, Assignment List
LE .
Inverting2
Active
Inactive
XOR
LE .
IN3
No assignment
1..n, Assignment List
LE .
Inverting3
Active
Inactive
XOR
LE .
IN4
No assignment
1..n, Assignment List
LE .
Inverting4
Active
Inactive
XOR
LE .
Reset Latched
No assignment
1..n, Assignment List
LE .
Inverting Reset
Active
Inactive
XOR
t-On Delay
t-Off Delay
Delay Timer
LE .
Inverting Set
Active
Inactive
XOR
LE . Gate Out
LE . Out
LE . Timer Out
LE . Out inverted
S Q
R1 Q
Fig. 51: Detailed Overview – Overall Logic Diagram.
Available Gates (Operators)
Within the Logic Equation, the following Gates can be used.
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6 Programmable Logic