Freescale Semiconductor MC68332 - Page 195

ELECTRICAL CHARACTERISTICS MC68332
A-20 USER’S MANUAL
Figure A-9 Bus Arbitration Timing Diagram — Idle Bus Case
NOTE: Show cycles can stretch during S42 when bus accesses take longer than two cycles due to IMB module
wait-state insertion.
Figure A-10 Show Cycle Timing Diagram
68300 BUS ARB TIM IDLE
CLKOUT
A0 A5
A0–A23
D0–D15
A2 A3 A0A5
BR
AS
BG
BGACK
33
33
47A
37
47A
35
47A
CLKOUT
S0 S41 S42 S0 S1 S2
A0–A23
R/W
AS
DS
D0–D15
BKPT
S43
68300 SHW CYC TIM
6 8
12
9
18
20
72
71
70
73
74
15
SHOW CYCLE
START OF
EXTERNAL CYCLE
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