Freescale Semiconductor MC68332 - Page 258

MC68332 REGISTER SUMMARY
USER’S MANUAL D-43
PTP Periodic Timer Prescaler Control PITR
RAF Receiver Active SCSR
RAMDS TPURAM Array Disable TRAMBAR
RASP[1:0] TPURAM Array Space TRAMMCR
RDRF Receive Data Register Full SCSR
RE Receiver Enable SCCR1
RIE Receiver Interrupt Enable SCCR1
RR[0:F] Receive Data RAM QSPI RAM
RSTEN Reset Enable SYNCR
R/W
Read/Write CSOR[0:10], CSORBT
RWU Receiver Wakeup SCCR1
R[8:0]/T[8:0] SCI Receive/Transmit Data SCDR
S Supervisor/User State SR
SBK Send Break SCCR1
SCBR SCI Baud Rate SCCR0
SHEN[1:0] Show Cycle Enable SIMCR
SLIMP LIMP Mode SYNCR
SLOCK Synthesizer Lock SYNCR
SLVEN Factory Test Mode Enabled SIMCR
SPACE Address Space Select CSOR[0:10], CSORBT
SPBR Serial Clock Baud Rate SPCR0
SPE QSPI Enable SPCR1
SPIF QSPI Finished Flag SPSR
SPIFIE SPI Finished Interrupt Enable SPCR2
SRBK Service Request Breakpoint Flag DSSR
STEXT Stop Mode External Clock SYNCR
STF Stop Flag TPUMCR
STOP Stop Enable QSMCR, TPUMCR, TRAMMCR
STRB Address Strobe/Data Strobe CSOR[0:10], CSORBT
STSIM Stop Mode System Integration Clock SYNCR
SUPV Supervisor/Unrestricted QSMCR, SIMCR, TPUMCR
SW Software Watchdog Reset RSR
SWE Software Watchdog Enable SYPCR
SWP Software Watchdog Prescale SYPCR
SWT[1:0] Software Watchdog Timing SYPCR
SYS System Reset RSR
T[1:0] Trace Enable SR
T2CG TCR2 Clock/Gate Control TPUMCR
TC Transmit Complete SCSR
TCIE Transmit Complete Interrupt Enable SCCR1
TCR1P TCR1 Prescaler Control TPUMCR
TCR2P TCR2 Prescaler Control TPUMCR
TDRE Transmit Data Register Empty SCSR
TE Transmitter Enable SCCR1
TIE Transmit Interrupt Enable SCCR1
TPUF TPU FREEZE Flag DSSR
TR[0:F] Transmit Data RAM QSPI RAM
TST Test Submodule Reset RSR
Table D-8 Register Bit and Field Mnemonics (Continued)
Mnemonic Name Register Location
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Freescale Semiconductor, Inc.
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