REGISTER SUMMARY MC68332
D-42 USER’S MANUAL
FE Framing Error SCSR
FRZBM Freeze Bus Monitor Enable SIMCR
FRZSW Freeze Software Enable SIMCR
FRZ[1:0] Freeze Control DSCR, QSMCR
HALT Halt SPCR3
HALTA Halt Acknowledge Flag SPSR
HLT Halt Monitor Reset RSR
HME Halt Monitor Enable SYPCR
HMIE HALTA and MODF Interrupt Enable SPCR3
HOT4 Hang on T4 DSCR
IARB[3:0] Interrupt Arbitration Field QSMCR, SIMCR, TPUMCR
IDLE Idle-Line Detected SCSR
ILIE Idle-Line Interrupt Enable SCCR1
ILQSPI Interrupt Level for QSPI QILR
ILSCI Interrupt Level for SCI QILR
ILT Idle-Line Detect Type SCCR1
INTV[7:0] Interrupt Vector Number QIVR
IP[2:0] Interrupt Priority Mask SR
IPL Interrupt Priority Level CSOR[0:10], CSORBT
LOC Loss of Clock Reset RSR
LOOPQ QSPI Loop Mode SPCR3
LOOPS Loop Mode SCCR1
M Mode Select SCCR1
MM Module Mapping SIMCR
MODE Asynchronous/Synchronous Mode CSOR[0:10], CSORBT
MODF Mode Fault Flag SPSR
MSTR Master/Slave Mode Select SPCR0
N Negative Flag CCR
NEWQP New Queue Pointer Value SPCR2
NF Noise Error SCSR
OR Overrun Error SCSR
PC[6:0] Port C Data PORTC
PCBK µPC Breakpoint Flag DSSR
PCS[3:0] Peripheral Chip Select CR[0:F]
PE Parity Enable SCCR1
PE[7:0] Port E Data PORTE
PEPA[7:0] Port E Pin Assignment PEPAR
PF Parity Error SCSR
PF[7:0] Port F Data PORTF
PFPA[7:0] Port F Pin Assignment PFPAR
PIRQL[2:0] Periodic Interrupt Request Level PICR
PITM[7:0] Periodic Interrupt Timing Modulus PITR
PIV[7:0] Periodic Interrupt Vector PICR
POW Power-Up Reset RSR
PQS[7:0] Port QS Data PORTQS
PQSPA[6:0] Port QS Pin Assignment PQSPAR
PSCK Prescaler Clock TPUMCR
PT Parity Type SCCR1
Table D-8 Register Bit and Field Mnemonics (Continued)
Mnemonic Name Register Location
Fr
ees
cale S
em
iconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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