Main Memory Performance
Latency to main memory is an important parameter in determining overall system performance.
With memory buses running at 125 MHz, the latency for a page hit is 8.5 cycles (68 ns), the latency
for a page closed is 11.5 cycles (92 ns), and the latency for a page miss is 14.5 cycles (116 ns).
Valid Memory Configurations
The HP 9000 rp7420 server is capable of supporting as little as 0.5 GB of main memory using two
256 MB DIMMs installed on a single cell board and as much as 128 GB by filling all 16 DIMM
slots on both cell boards with 4 GB DIMMs.
DIMMs must be loaded in sets of two at specified locations on the cell board. Two DIMMs are
called a rank; two ranks would be equivalent to four DIMMs, three ranks would be six DIMMs,
and so on. The DIMMs must be the same size in a rank. The DIMMs across all cells in a partition
should have identical memory loaded. Figure 1-9 shows the DIMM slot layout on the cell board.
For DIMM load order, see Table 1-4.
A quad seen in Figure 1-9 is a grouping of four DIMMs. Configurations with 8 or 16 DIMM slots
loaded are recommended. The DIMM sizes in a quad can be different but the DIMMs in a rank
must be the same size.
Table 1-4 DIMM Load Order
Quad LocationDIMM Location on Cell
Board
Action TakenNumber of DIMMs Installed
Quad 00A and 0BInstall First2 DIMMs = 1 Rank
Quad 11A and 1BAdd Second4 DIMMs = 2 Ranks
Quad 22A and 2BAdd Third6 DIMMs = 3 Ranks
Quad 33A and 3BAdd Fourth8 DIMMs = 4 Ranks
Quad 04A and 4BAdd Fifth10 DIMMs = 5 Ranks
Quad 15A and 5BAdd Sixth12 DIMMs = 6 Ranks
Quad 26A and 6BAdd Seventh14 DIMMs = 7 Ranks
Quad 37A and 7BAdd Last16 DIMMs = 8 Ranks
Detailed HP 9000 rp7420 Server Description 25
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