Intel Agilex

3.2.2. AS Single-Device Configuration
Figure 35. Connections for AS x4 Single-Device Configuration
Pin 1
R
UP
R
DN
R
UP
TCK
TDO
TMS
OPEN
TDI
GND
VCCIO_SDM
OPEN
OPEN
GND
G
ND
V
CCIO_SDM
Intel FPGA
nCONFIG
nSTATUS
CONF_DONE
INIT_DONE
OSC_CLK_1
MSEL[2:0]
AS_DATA[3:0]
AS x4 Flash Memory
AS_CLK
AS_nCS0
Download cable 10 pin male header
DATA[3:0]
DCLK
nCS0
Configuration
Control Signals
Optional
Monitoring
10kΩ
Optional
Configuration
Data Signals
To JTAG
Header or
JTAG Chain
MSEL
V
CCIO_SDM
3
4
TCK
TDO
TDI
TMS
JTAG
Configuration
Pins
FPGA
Image (.rpd)
3M Part number : 2510-6002UB
10kΩ
Related Information
MSEL Settings on page 27
3. Intel Agilex Configuration Schemes
UG-20205 | 2019.10.09
Intel
®
Agilex
™
Configuration User Guide
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