2. Intel Agilex Configuration Details
2.1. Intel Agilex Configuration Timing Diagram
Figure 4. Configuration, Reconfiguration, and Error Timing Diagram
nCONFIG
nSTATUS
CONF_DONE
INIT_DONE
nINIT_DONE
MSEL[2:0]
Data[<n>-1:0](Generic)
AVST_READY (Aavalon ST only)
AVST_VALID (Avalon ST only)
AS_CS0 (AS only)
Configuration_State
Power_Supply_Status[7:0]
GPIO Status
Power On Reset
User Mode
Reconfiguration Triggered Reconfiguration Configuration Error
Idle Configuration Initialization User Mode
Idle
Configuration Idle
Sample
Power On SDM Start Device Clean Power DownErr
Group 1
Supply Up
Group 2
Supply Up
Group 3
Supply Up
Grp 3
Down
Grp 2
Down
Group 1
Down
Tri-Stated with Weak Pull-Up
User Defined Undetermined. Signal value is between Vccio_pio and GND
1
2
3
4
5
1
3 5
4
2
1
2
3
(weak int/ext pullup)
(internal signal)
UG-20205 | 2019.10.09
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