Note:
nSTATUS does not go low for PR failures or failures using the JTAG configuration scheme.
Generally, the Intel Agilex device changes the value of nSTATUS to follow the value of nCONFIG, except after an error. For
example, after POR, nSTATUS asserts after nCONFIG asserts. When the host drives nCONFIG high, the Intel Agilex device
drives nSTATUS high.
In previous device families the deassertion of nSTATUS indicates the device is ready for configuration. For Intel Agilex
devices, when using Avalon-ST configuration scheme, after the Intel Agilex device drives nSTATUS high, you must also
monitor the AVST_READY signal to determine when the device is ready to accept configuration data.
nSTATUS asserts if an error occurs during configuration. The pulse ranges from 0.5 ms to 10 ms.
nSTATUS assertion is asynchronous to data error detection. Intel Agilex devices do not support the auto-restart
configuration after error option.
Previous device families implement the nSTATUS as an open drain with a weak internal pull-up. Intel Agilex always drives
nSTATUS. Consequently, you cannot wire OR an Intel Agilex nSTATUS signal with the nSTATUS signal from earlier device
families.
Debugging Suggestions
Ensure nSTATUS acknowledges nCONFIG. If nSTATUS is not following nCONFIG, the FPGA may not have exited POR. You may
need to power cycle the PCB.
6.7.3. CONF_DONE and INIT_DONE
For Intel Agilex devices, both CONF_DONE and INIT_DONE share multiplexed SDM_IO pins. Previous device families
implement the CONF_DONE and INIT_DONE pins as open drains with a weak internal pull-up. Consequently, you cannot wire
OR an Intel Agilex CONF_DONE or INIT_DONE signal with the nSTATUS signal from previous device families. Otherwise,
CONF_DONE and INIT_DONE behave as these signals behaved in earlier device families. If you assign CONF_DONE and
INIT_DONE to SDM_IO16 and SDM_IO0, weak internal pull-downs pull these pins low at power-on reset. Ensure you specify
these pins in the Intel Quartus Prime Software or in the Intel Quartus Prime settings file, (.qsf). CONF_DONE and
INIT_DONE are low prior to and during configuration. CONF_DONE asserts when the device finishes receiving configuration
data. INIT_DONE asserts when the device enters user mode.
Note: The entire device does not enter user mode simultaneously.Intel recommends that you include the Reset Release Intel FPGA
IP on page 23 to hold your application logic in the reset state until the entire FPGA fabric is in user mode.
6. Intel Agilex Debugging Guide
UG-20205 | 2019.10.09
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