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Multilin SR469 - 6.2.4 ERROR CHECKING

Multilin SR469
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6. COMMUNICATIONS PROTOCOL
6-3
6.2.4
ERROR CHECKING
The RTU version of Modbus includes a two byte CRC-16 (16 bit cyclic redundancy check) with every transmission. The CRC-16 algo-
rithm essentially treats the entire data stream (data bits only; start, stop and parity ignored) as one continuous binary number. This
number is first shifted left 16 bits and then divided by a characteristic polynomial (11000000000000101B). The 16 bit remainder of the
division is appended to the end of the transmission, LSByte first. The resulting message including CRC, when divided by the same
polynomial at the receiver will give a zero remainder if no transmission errors have occurred.
If an SR469 Modbus slave device receives a transmission in which an error is indicated by the CRC-16 calculation, the slave device will
not respond to the transmission. A CRC-16 error indicates than one or more bytes of the transmission were received incorrectly and
thus the entire transmission should be ignored in order to avoid the SR469 performing any incorrect operation.
The CRC-16 calculation is an industry standard method used for error detection. An algorithm is included here to assist programmers in
situations where no standard CRC-16 calculation routines are available.
CRC-16 Algorithm
Once the following algorithm is complete, the working register "A" will contain the CRC value to be transmitted. Note that this algorithm
requires the characteristic polynomial to be reverse bit ordered. The MSbit of the characteristic polynomial is dropped since it does not
affect the value of the remainder. The following symbols are used in the algorithm:
--> data transfer
A 16 bit working register
AL low order byte of A
AH high order byte of A
CRC 16 bit CRC-16 value
i,j loop counters
(+) logical exclusive or operator
Di i-th data byte (i = 0 to N-1)
G 16 bit characteristic polynomial = 1010000000000001 with MSbit dropped and bit order reversed
shr(x) shift right (the LSbit of the low order byte of x shifts into a carry flag, a '0' is shifted into the
MSbit of the high order byte of x, all other bits shift right one location
algorithm:
1. FFFF hex --> A
2. 0 --> i
3. 0 --> j
4. Di (+) AL --> AL
5. j+1 --> j
6. shr(A)
7. is there a carry? No: go to 8.
Yes: G (+) A --> A
8. is j = 8? No: go to 5.
Yes: go to 9.
9. i+1 --> i
10. is i = N? No: go to 3.
Yes: go to 11.
11. A --> CRC

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