Technical Information 1-19
Table Section 1-8 Versa P Series Interrupt Level Assignments
Controller
Master/Slave
Priority
Name
Device
Slave
9
IRQ14 Hard Disk Controller 1
Slave 10 IRQ15 Reserved (2nd HDD IDE on D/S)
Master 11 IRQ03 Reserved
Master 12 IRQ04 Serial Port 1
Master 13 IRQ05 Reserved (Sound)
Master 14 IRQ06 Diskette Drive Controller*
Master 15 IRQ07 Parallel Port 1*
*Industry standard locations
POWER MANAGEMENT OVERVIEW
The Versa P system uses power management features to prolong system battery life.
The CPU implements a System Management Interrupt (SMI) function that works transpar-
ently with the operating system and application software. When activated, the processor
mode changes to real mode. Unique “SM-RAM” containing power management software is
mapped at address 30000h-3FFFFh. This activity is inherent to the system and does not re-
quire any adjustment to the operating system or application software.
The power management program is located in ROM at location EA000h-0EFFFh. In on-
board DRAM, the software is physically allocated at 0D0000h-0DFFFFh.
Use Auto Setup to select specific power management options. For information on how to
select these options, see Section 2.
NOTE: Power management features are un-
available under Docking Station II operation.
System Power Management
The system power management consists of the following operation modes. These modes
are:
n Active Mode In active mode, the system uses maximum power. It operates
with the default clock speed (75 MHz). The system continues to run at this speeds
unless overwritten by the power management features.
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