Panasonic AJ-D610WBP - Page 124

CAMERA SYNC BLOCK DIAGRAM
BLK-10
CAMERA SYSCON(P1-50A)
CAMERA SYSCON(P1-12A)
CAMERA SYSCON(P1-13A)
P501
P501
P501
49B H-PHASE
12B SEL0
13B SEL1
<A>
<B>
16B CAM_L
25A ACBK
P501
39A GL_INBNC(P3-1)-MOTHER(P9620-1)
P501
49A SCPHFINE
P501
28A,B ASYNC
CAMERA SYSCON(P1-50B)
129
IC201(1/2)<3>
WINDOW
PULSE GEN
25
13
12
IC7<1>
11
3
3
WND2
7
7
3
IC8<1> X1<1>
PHASE
COMP
FILTER
AMP
10
9
IC7<1>
8
IC12<1>
PHASE
COMP
FILTER
AMP
VCO
27MHz
1
8
X3<1>
VCO
36MHz
1
2
4
IC10<1>
IC201(2/2)<3>
2
IC9<1>
4
132 2CK1
CK2
IC101,104,105<2>
5
4
1 9 HR
VR103
H RESET
PULSE GEN
H PHASE
IC102<1>
12 13
IC101,501<2>
SCH
DET
SCH
DET
VR101
16
19
HO
RHS
H SYNC
SEP
H SYNC
SEP
TP2
164
RSY3
IC2<1>
4
CLAMP
SYNC
SEP
IC4,105<1>
BURST
SEP
SC
PHASE
33~35
204
193
DET1~3
SDET
RBFI
IC107<2>
<SHP>
<RBF>
210
12
11
5
9
15
1
14
3
4FSC PHASE
SC PHASE
L.P.F
8 9
L102,C123,
Q102
IC106<2>
X101<2>
4
14.3MHz(NTSC)
17.7MHz(PAL)
VCO
IC110,105<2>
LALI
GEN
IC6,7<2>
FILTER AMP
VR102
SCH
PHASE
11 SCH1 10 SCH2
4
5
1
R204
NTSC
ONLY
( )
PAL
ONLY
( )
SC
PHASE
IC5<1>
189 LALIO
184 VXO1
191
RBST
196 SCDL
195
181 FSC1
WSC
1/2
1/2
2 fsc
TP101
X102<2>
IC108<2>
4 6 7 3
1
1
2
13
12
IC106<2>
IC106
FILTER
AMP
14.3MHz
(NTSC)
17.7MHz
(PAL)
VCO
VR104
FF
SYNC
DET
V RESET
GEN
H SYNC
GEN
V SYNC
GEN
2 fH
2 fH
1/2
1/455
(NTSC)
1/567
(PAL)
DATA
SELECTER
VP
OUTPUT
LATCH
COMPOSITE
SYNC GEN
1/2
V COUNTER
10bit
V COUNTER
10bit
65
84
S CLK
82
GA LD
83
S DATA
<S CLK>
<S DATA>
<GALD>
S/P
2CK2
1/429(NTSC)
1/435(PAL)
H SYNC
GEN
1/2
2 fH
NTSC
PAL
TIMNG
SHIFT
1/525
(NTSC)
1/625
(PAL)
SCC1
SCC2 L H H
HH
L L
L L
270900 180
188
200
199
150
20
201
202
192
169
SCC1
PFBW
SCC2
<RBF>
<SHP>
149
3
3
13 VXO2
FSC2
LALI
1/4
1/4 1/4
F/F
MULTI-
PLEXER
1/4
PAL P
GEN
PAL P
SC GEN
/2700/90 / 180
SC4
(To 2/2)
LALI
(To 2/2)
SC3
(To 2/2)
WND
LALI
(From 1/2)
PFBWI
SCPH1
SCPH2
RBF
DSYNC
203 SHP
SC4
(From 1/2)
SC3
(From 1/2)
FSC2
(From 1/2)
D.FF
H COUNTER
7 bit
TEST R
TEST G
TEST B
SELECT
DECODER
DECODER
DECODER
GATE
D.FF
TOGGLE
TOGGLE
H COUNTER
10bit
1/8
V SYNC
SEP
V COUNTER
4bit
F.F.
GATE
DECODER
F.F.
V COUNTER
9bit
LATCH
F.F.
F.F.
SHIFT
REGISTER
D.FF
HD
SC 4
DSYNCB
ADCP
CBK
SC 3
ENC CP
ENC CP
136
159
55
115
154
153
CBK
ADCP
BF
PR SC
PB SC
TEST R
TEST G
TEST B
<TR>
<TG>
<TB>
CF 138
161PALP
HD2 28
RFRM 139
54DSYNCA
DSYNCC
50A
50B 103
56
102
EXT
BLK
108
121
207
CCD VD
CCD HD
112,113
152
114
CPOB 1,2
CPOB DS
VD
127
TP205
IC205<3>
VD
CPOB DS
CPOB 1
CCD VD
EXT
P501
23A,B
79B
CPOB 2
80B
76B
OFFSETOB
46A
20A
15B
31B
BLK 24B
50A
50B
30A
31A
SYNCD
13A
TP204
TP206
SYSC E
FIELD
HD
PALP
TP207
TP501
TP201
P501
14A
P501
P501
P501
27B
22A,B
26A
P501
37A
16A
15A
P501
35A
33A
4FSC
APALP
(TEST SYNC)
18B
P501
P501
27A
P501
42B
44B
46B
MOTHER(P9601-30B)-PRE PROCESSP3-16)
MOTHER(P9601-31A)-PRE PROCESSP3-17)
MOTHER(P9601-31B)-PRE PROCESSP3-18)
ENCODER(P1-34B)
ENCODER(P1-32B)
ENCODER(P1-36B)
CAMERA SYSCON(P1-14B)
CAMERA SYSCON(P1-15B)
CAMERA SYSCON(P1-22A)
CAMERA SYSCON(P1-16A)
CAMERA SYSCON(P1-22B)
CAMERA SYSCON(P1-13B)
MOTHER(P9601-2B)-PULSE(P1-23)
MOTHER(P9601-4B)-PULSE(P1-18)
MOTHER(P9601-8)-PULSE(P1-10)
CAMERA SYSCON(P1-15A)
PRE PROCESS(P3-34)
PRE PROCESS(P3-4)
PRE PROCESS(P3-5)
CAMERA SYSCON(P1-65B)
MOTHER(P9601-23A)-PULSE(P3-2)
MOTHER(P9601-23B)-PULSE(P3-3)
CAMERA SYSCON(P1-20B)
CCD PULSE(P1-9)
CAMER
Not used
Not used
Not used
A SYSCON(P1-78B)
CAMERA SYSCON(P1-79A)
CAMERA SYSCON(P1-18B)
27M CAM
P501
P501
S DATA
S CLK
GA LD
FCK
CCD HD
P501
P501
<S DATA>
<S CLK>
<GA LD>
107
TESTHD
18A
2FCK
3
2
1
4
2
IC206<3>
IC405<4>
11
10
IC206<3>
9
8
IC206<3>
1
2
IC202<3>
3
4
IC206<3>
3
4
IC202<3>
9
8
IC202<3>
11
10
IC102<2>
5
6
TP4
TP5
VTR SYSCON(P1-15B)
Q2-5
Q1
VR1
BUF
TP1
TP3
SW1
SYNC SW<1>
26P
IC3102<2>
IC3102<2>
Buffer
IC103<2>
VR2
Buffer
IC6<1>
FSC2(To 2/2)
RSY
TEST
SG
Q502~507 <5>
TEST_LEV
IC503<5>
1 2
7
3
IC503<5>
5 6
VR505
VR507
VR506
VR504
LPF
L501,Q501
C501,502 <5>
OFFSET
OB
151
9 8
MOD4
IC501<5>
VR508
5
5
6
7
6
MOD3
IC501<5>
VR503
3
3
3
4
4
MOD2
IC501<5>
VR502
1
14
1
2
2
2
MOD1
IC501<5>
VR501
1C3
1C0
1C1
1C2
A B
Y1
IC204<3>
IC502<5>
+5V
4
1
2
IC14<1>
+5V
CK1 PHASE
79A
78B
78A
67B
14B
36M CAM
67A
18M CAM
69A
80A
5
4
1
7
IC3,18
<1>
<INT H>
<DET1>
<DET2>
<DET3>
1/2
11 12
IC105<2>
BUF
IC204<3>
IC204<3>
IC205<3>
11
13
BUFFER
6
4
BUFFER
IC204<3>
8
10
BUFFER
8
9
BUFFER
IC212,
IC213<3>
CPOB
TIMING
Not used
Not used
Not used