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Phytec phyFLEX-i.MX 6 - Table of Contents

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Contents
PHYTEC Messtechnik GmbH 2013 L-773e_2
i
List of Figures ............................................................................................... ii
List of Tables ............................................................................................... iii
Conventions, Abbreviations and Acronyms .............................................. v
Preface .......................................................................................................... ix
1 Introduction ......................................................................................... 1
1.1 Block Diagram ............................................................................. 4
1.2 phyFLEX-i.MX 6 Component Placement .................................... 5
1.3 Minimum Requirements to operate the phyFLEX-i.MX 6 .......... 7
2 Pin Description .................................................................................... 8
3 Jumpers .............................................................................................. 23
4 Power .................................................................................................. 27
4.1 Primary System Power (VDD_5V_IN_R) ................................. 27
4.2 Power Management IC (PMIC) (U14) ....................................... 28
4.2.1 Power Domains ............................................................. 29
4.3 Supply Voltage for external Logic ............................................. 32
4.4 Control Management IC (CMIC) (U17)) ................................... 32
5 System Configuration and Booting ................................................. 33
6 System Memory ................................................................................. 38
6.1 DDR3-SDRAM (U2-U9) ........................................................... 38
6.2 NAND Flash Memory (U13) ..................................................... 39
6.3 I²C EEPROM (U10) ................................................................... 39
6.3.1 EEPROM Write Protection Control (J3) ...................... 40
6.4 SPI Flash Memory (U25) ) ......................................................... 40
7 SD / MMC Card Interfaces .............................................................. 41
8 Serial Interfaces ................................................................................. 43
8.1 Universal Asynchronous Interface ............................................. 44
8.2 USB OTG Interface .................................................................... 45
8.3 USB Host Interface .................................................................... 46
8.4 Ethernet Interface ....................................................................... 47
8.4.1 Ethernet PHY (U11) ...................................................... 47
8.4.2 Software Reset of the Ethernet Controller .................... 48
8.4.3 MAC Address ................................................................ 49
8.5 I
2
C Interface ............................................................................... 49
8.6 SPI Interface ............................................................................... 50
8.7 I
2
S Audio Interface (SSI)) .......................................................... 51
8.8 CAN Interface ............................................................................ 52
8.9 SATA Interface .......................................................................... 52
8.10 PCI Express Interface ................................................................. 53
8.11 Media Local Bus ........................................................................ 54
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