Phytec phyFLEX-i.MX 6 - phyFLEX-fix Connector X1 Pinout (Row B)

Pin Description
 PHYTEC Messtechnik GmbH 2013 L-773e_2
13
X1A61
X_GPIO5 I/O VDD_3V3_LOGIC
General purpose
input/output 5
X1A62 X_GPIO6 I/O VDD_3V3_LOGIC
General purpose
input/output 6
X1A63 X_GPIO7 I/O VDD_3V3_LOGIC
General purpose
input/output 7
X1A64 GND - - Ground 0 V
X1A65 X_GPIO8 I/O VDD_3V3_LOGIC
General purpose
input/output 8
X1A66 X_GPIO9 I/O VDD_3V3_LOGIC
General purpose
input/output 9
X1A67 X_GPIO10 I/O VDD_3V3_LOGIC
General purpose
input/output 10
X1A68 X_I2C0_SDA OC-BI VDD_3V3_LOGIC I2C0 data
X1A69 X_I2C0_SCL OC-BI VDD_3V3_LOGIC I2C0 clock
X1A70 GND - - Ground 0 V
X1A71 reference-voltage REF_O VDD_3V3_LOGIC I2C0 reference voltage
X1A72 X_PM_nRESET_IN IPU VDD_PM Reset input
X1A73 X_PM_nRESET_OUT OC - Reset output
X1A74 X_PM_SDA OC-BI VDD_3V3_LOGIC
Power management bus
data (EMIC)
X1A75 X_PM_SCL OC-BI VDD_3V3_LOGIC
Power management bus
clock (EMIC)
X1A76 GND - - Ground 0 V
X1A77
X_PM_nON/WAKEUP/
OFF
IPU VDD_PM
Power on/wakeup/power
off input
X1A78 X_PM_PWR_GOOD OC - Power good output
X1A79 X_PM_PWM OC - Fan PWM output
X1A80 X_PM_TACHO 5V_PD - Fan tacho input
Table 3: Pinout of the phyFLEX-fix Connector X1, Row A (continued)
Pin # Signal ST Voltage Domain Description
X1B1 VDD_5V_IN_R PWR_I 5V
5 V Primary Voltage
Supply Input
X1B2 VDD_5V_IN_R PWR_I 5V
5 V Primary Voltage
Supply Input
X1B3 VDD_5V_IN_R PWR_I 5V
5 V Primary Voltage
Supply Input
X1B4 GND - - Ground 0 V
X1B5 reference-voltage REF_O VDD_3V3_LOGIC JTAG reference voltage
X1B6 RSVD - - Reserved
X1B7 GND - - Ground 0 V
Table 4: Pinout of the phyFLEX-fix Connector X1, Row B
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