Phytec phyFLEX-i.MX 6 - System Configuration and Booting; Boot Device Configuration

System Configuration and Booting
 PHYTEC Messtechnik GmbH 2013 L-773e_2
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5 System Configuration and Booting
Although most features of the i.MX 6 microcontroller are configured
and/or programmed during the initialization routine, other features,
which impact program execution, must be configured prior to
initialization via pin termination.
The system start-up configuration includes:
 Boot device order configuration
During the reset cycle the operational system boot mode of the i.MX 6
processor is determined by the configuration of two BOOTMODE
pins BOOT_MODE[1:0]. These pins select the boot type. If the boot
type is set to “Internal boot” (BOOT_MODE[1:0]=10,
BOOT_CFGx[7:0] are used to configure further boot options. You can
find further information about these boot pins in the i.MX 6 Reference
Manual.
The internal ROM code is the first code executed during the
initialization process of the i.MX 6 after POR. The ROM code detects
which boot devices the controller has to check by using the
BOOT_MODE[1:0] and particular BOOT_CFGx[7:0] pin
configuration. For serial boot devices, the ROM code polls the
communication interface selected, initiates the download of the code
into the internal RAM and triggers its execution from there. For
memory booting, the ROM code finds the bootstrap in permanent
memories such as NAND-Flash or SD-Cards and executes it. Please
refer to the i.MX 6 Reference Manual for more information.
The phyFLEX-i.MX 6 provides three boot configuration pins
BOOT[2:0]. The setting of these pins configures the boot device
which is selected by the processor. The standard phyFLEX boot
options are shown in Table 10. Boot options specific for the i.MX 6
controller ar e shown in Table 11.
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