Phytec phyFLEX-i.MX 6 - List of Tables

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 PHYTEC Messtechnik GmbH 2013 L-773e_2

iii

List of Tables

Table 1: Signal Types used in this Manual ............................................ vii

Table 2: Abbreviations and Acronyms used in this Manual ................. viii

Table 3: Pinout of the phyFLEX-fix Connector X1, Row A ................. 11

Table 4: Pinout of the phyFLEX-fix Connector X1, Row B ................. 13

Table 5: Pinout of the phyFLEX-optional Connector X2, Row A ........ 16

Table 6: Pinout of the phyFLEX-optional Connector X2, Row B ......... 17

Table 7: Pinout of the phyFLEX-flex Connector X3, Row A ............... 19

Table 8: Pinout of the phyFLEX-flex Connector X3, Row B ................ 20

Table 9: Jumper Settings ........................................................................ 26

Table 10: Standard phyFLEX Boot Options ............................................ 34

Table 11: phyFLEX-i.MX 6 specific Boot Options ................................. 34

Table 12: Boot Configuration Pins at phyFLEX-flex Connector X3 ..... 35

Table 13: Boot Configuration Signals generated by the CMIC ............... 37

Table 14: EEPROM write protection states via J3 ................................... 40

Table 15: Location of SD/ MMC Card Interface Signals ........................ 41

Table 16: Location of the UART Signals ................................................. 44

Table 17: Location of the USB OTG Signals .......................................... 45

Table 18: Location of the USB-Host Signals ........................................... 46

Table 19: Location of the Ethernet Signals .............................................. 47

Table 20: I

C Interface Signal Location ................................................... 49

Table 21: SPI Interface Signal Location .................................................. 50

Table 22: I

S Interface Signal Location ................................................... 51

Table 23: CAN Interface Signal Location ................................................ 52

Table 24: SATA Interface Signal Location .............................................. 52

Table 25: PCIe Interface Signal Location ................................................ 53

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