Phytec phyFLEX-i.MX 6 - Table 32: Pixel Mapping of 18-Bit LVDS Display Interface; Table 33: Pixel Mapping of 24-Bit LVDS Display Interface

phyFLEX
®
-i.MX 6 [PFL-A-XL1-xxx
64  PHYTEC Messtechnik GmbH 2013 L-773e_2
Note:
To be fully compatible to the phyFLEX specification, make sure that
the LVDS display you want to use provides the same pin mapping as
the phyFLEX (JEIDA respectively OpenLDI). Normally this is only
important for 24-bit LVDS displays because due to the organization of
the LVDS pixel mapping all common 18-bit LVDS displays should
work.
18-bit LVDS Display
1 2 3 4 5 6 7
CLK 1 1 0 0 0 1 1
A0 G0 R5 R4 R3 R2 R1 R0
A1 B1 B0 G5 G4 G3 G2 G1
A2 DE VSYNC HSYNC B5 B4 B3 B2
A3 0 0 0 0 0 0 0
Table 32: Pixel Mapping of 18-bit LVDS Display Interface
24-bit LVDS Display
1 2 3 4 5 6 7
CLK 1 1 0 0 0 1 1
A0 G2 R7 R6 R5 R4 R3 R2
A1 B3 B2 G7 G6 G5 G4 G3
A2 DE VSYNC HSYNC B7 B6 B5 B4
A3 0 B1 B0 G1 G0 R1 R0
Table 33: Pixel Mapping of 24-bit LVDS Display Interface
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