Phytec phyFLEX-i.MX 6 - Table 12: Boot Configuration Pins at Phyflex-Flex Connector X3

phyFLEX
®
-i.MX 6 [PFL-A-XL1-xxx
36  PHYTEC Messtechnik GmbH 2013 L-773e_2
Pin # Signal I/O SL Description Configuration
Pin
X3A57 X_EIM_DA11 I/O 3.3 V EIM address/data11 BCFG2[3]
X3A58 X_EIM_DA12 I/O 3.3 V EIM address/data12 BCFG2[4]
X3A59 X_EIM_A16 O 3.3 V EIM address16 BCFG3[0]
X3B25 X_EIM_LBA O 3.3 V EIM load burst address BCFG4[2]
X3B26 X_EIM_RW O 3.3 V EIM Read/write BCFG4[5]
X3B31 X_EIM_DA13 I/O 3.3 V EIM address/data13 BCFG2[5]
X3B32 X_EIM_DA14 I/O 3.3 V EIM address/data14 BCFG2[6]
X3B34 X_EIM_DA15 I/O 3.3 V EIM address/data15 BCFG2[7]
Table 12: Boot Configuration Pins at phyFLEX-flex Connector X3 (continued)
By setting the desired boot mode with the phyFLEX boot
configuration pins BOOT[2:0], the CMIC, which is populated on the
module, sets some of the appropriate BCFG pins and the
BOOT_MODE[1:0] pins of the i.MX 6 controller. Only BCFG1[7:4],
BCFG2[1], BCFG4[2] and BOOT_MODE[1:0] can be set by the
CMIC. All other BCFG pins are set to a fixed value by 10 kΩ
configuration resistors which are located on the phyFLEX module.
Furthermore BCFG1[4], BCFG2[1] and BCFG4[2] have 10 kΩ on
board configuration resistors, too.
The specific boot configuration settings, which are set by the on board
configuration resistors, can be changed by modifying the resistors on
the module or by connecting a configuration resistor (e.g. 1 kΩ) to the
configuration signal. Please consider that any change of the default
BCFG configuration can also influence other boot modes, which
might result in faulty boot behavior.
For further information about the different boot modes and the
influence of the BCFG pins please see the i.MX 6 Reference Manual.
Table 13 shows to which level the CMIC sets the different
configuration signals for the boot modes. “Z” means that the CMIC
sets the signal to high impedance, and thus the value of the
configuration resistor is used.
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