Phytec phyFLEX-i.MX 6 - Boot Configuration Pins

System Configuration and Booting
 PHYTEC Messtechnik GmbH 2013 L-773e_2
35
The BOOT[2:0] lines have 10 kΩ pull-up resistors populated on the
module. Hence leaving the three pins unconnected sets the controller
to boot mode 0, NAND boot.
Note:
As some of the signals which are brought out on the phyFLEX-flex
connector are used to configure the boot mode for specific boot
options, please make sure that these signals are not driven by any
device on the baseboard during reset. The signals which may affect
the boot configuration are shown in Table 12.
Pin # Signal I/O SL Description Configuration
Pin
X3A31 X_EIM_WAIT I 3.3 V EIM wait BCFG4[1]
X3A32 X_EIM_A24 O 3.3 V EIM address24 BCFG4[0]
X3A33 X_EIM_A23 O 3.3 V EIM address23 BCFG3[7]
X3A34 X_EIM_A22 O 3.3 V EIM address22 BCFG3[6]
X3A35 X_EIM_A21 O 3.3 V EIM address21 BCFG3[5]
X3A37 X_EIM_A20 O 3.3 V EIM address20 BCFG3[4]
X3A38 X_EIM_A19 O 3.3 V EIM address19 BCFG3[3]
X3A39 X_EIM_A18 O 3.3 V EIM address18 BCFG3[2]
X3A40 X_EIM_A17 O 3.3 V EIM address17 BCFG3[1]
X3A41 X_EIM_EB0 O 3.3 V EIM enable byte0 BCFG4[3]
X3A43 X_EIM_EB1 O 3.3 V EIM enable byte1 BCFG4[4]
X3A44 X_EIM_DA0 I/O 3.3 V EIM address/data0 BCFG1[0]
X3A45 X_EIM_DA1 I/O 3.3 V EIM address/data1 BCFG1[1]
X3A46 X_EIM_DA2 I/O 3.3 V EIM address/data2 BCFG1[2]
X3A47 X_EIM_DA3 I/O 3.3 V EIM address/data3 BCFG1[3]
X3A49 X_EIM_DA4 I/O 3.3 V EIM address/data4 BCFG1[4]
X3A50 X_EIM_DA5 I/O 3.3 V EIM address/data5 BCFG1[5]
X3A51 X_EIM_DA6 I/O 3.3 V EIM address/data6 BCFG1[6]
X3A52 X_EIM_DA7 I/O 3.3 V EIM address/data7 BCFG1[7]
X3A53 X_EIM_DA8 I/O 3.3 V EIM address/data8 BCFG2[0]
X3A55 X_EIM_DA9 I/O 3.3 V EIM address/data9 BCFG2[1]
X3A56 X_EIM_DA10 I/O 3.3 V EIM address/data10 BCFG2[2]
Table 12: Boot Configuration Pins at phyFLEX-flex Connector X3
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