Phytec phyFLEX-i.MX 6 - Page 6

phyFLEX
®
-i.MX 6 [PFL-A-XL1-xxx
iv  PHYTEC Messtechnik GmbH 2013 L-773e_2
Table 26: Media Local Bus Interface Signal Location ............................ 54
Table 27: Location of GPIO Pins ............................................................. 55
Table 28: Debug Interface Signal Location at phyFLEX-Connector X1 58
Table 29: JTAG Connector X4 Signal Assignment ................................. 61
Table 30: Display Interface Signal Location ........................................... 62
Table 31: Second Display Interface Signal Location at X3 ..................... 63
Table 32: Pixel Mapping of 18-bit LVDS Display Interface ................... 64
Table 33: Pixel Mapping of 24-bit LVDS Display Interface ................... 64
Table 34: HDMI Interface Signal Location at X2 ................................... 65
Table 35: Camera Interface Signal Location at X2.................................. 66
Table 36: LVDS Signal Configuration J9 and J31 .................................. 67
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