Renesas RL78/G13 - Page 179

RL78/G13 CHAPTER 3 CPU ARCHITECTURE
R01UH0146EJ0100 Rev.1.00 160
Sep 22, 2011
Figure 3-42. Example of [HL + byte], [DE + byte]
Target memory
OP code
Memory
byte
FFFFFH
F0000H
rp (HL/DE)
Figure 3-43. Example of word[B], word[C]
Target memory
Memory
FFFFFH
F0000H
r (B/C)
OP code
Low Addr.
High Addr.
Figure 3-44. Example of word[BC]
Target memory
Memory
FFFFFH
F0000H
rp (BC)
OP code
Low Addr.
High Addr.