RL78/G13 CHAPTER 4 PORT FUNCTIONS
R01UH0146EJ0100 Rev.1.00 269
Sep 22, 2011
(9) Global digital input disable register (GDIDIS)
This register is used to prevent through-current flowing from the input buffers when EV
DD is 0 V.
By setting the GDIDIS0 bit to 1, input to any input buffer connected to EVDD is prohibited, preventing through-current
from flowing when the power supply connected to EV
DD is turned off.
When using the GDIDIS register, be sure to set the GDIDIS0 bit to 1 before turning off the EV
DD power supply, and
then clear the GDIDIS0 bit to 0 after turning on the EVDD power supply.
The GDIDIS register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Figure 4-73. Format of Global Digital Input Disable Register (GDIDIS)
Address: F007DH After reset: 00H R/W
Symbol 7 6 5 4 3 2 1 0
GDIDIS 0 0 0 0 0 0 0 GDIDIS0
GDIDIS0 Setting of input buffers when EVDD is 0 V
0 Input to input buffers permitted (default)
1 Input to input buffers prohibited. No through-current flows to the input buffers.
<R>
To Next Page
Loading...
