RL78/G13 CHAPTER 18 STANDBY FUNCTION
R01UH0146EJ0100 Rev.1.00 859
Sep 22, 2011
Table 18-1. Operating Statuses in HALT Mode (2/2)
Remark Operation stopped: Operation is automatically stopped before switching to the HALT mode.
Operation disabled: Operation is stopped before switching to the HALT mode.
fIH: High-speed on-chip oscillator clock
fIL: Low-speed on-chip oscillator clock
f
X: X1 clock
fEX: External main system clock
fXT: XT1 clock
f
EXS: External subsystem clock
When HALT Instruction Is Executed While CPU Is Operating on Subsystem Clock HALT Mode Setting
Item
When CPU Is Operating on XT1 Clock (fXT) When CPU Is Operating on External
Subsystem Clock (f
EXS)
System clock Clock supply to the CPU is stopped
fIH
fX
Main system clock
fEX
Operation disabled
fXT Operation continues (cannot be stopped) Cannot operate
Subsystem clock
fEXS Cannot operate Operation continues (cannot be stopped)
fIL Set by bits 0 (WDSTBYON) and 4 (WDTON) of option byte (000C0H), and WUTMMCK0 bit of
operation speed mode control register (OSMC)
• WUTMMCK0 = 1: Oscillates
• WUTMMCK0 = 0 and WDTON = 0: Stops
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 1: Oscillates
• WUTMMCK0 = 0, WDTON = 1, and WDSTBYON = 0: Stops
CPU
Code flash memory
Data flash memory
RAM
Operation stopped
Port (latch) Status before HALT mode was set is retained
Timer array unit Operable (Operation is disabled while in the low consumption RTC mode (when the RTCLPC
bit of the OSMC register is 1))
Real-time clock (RTC)
Interval timer
Operable
Watchdog timer See CHAPTER 10 WATCHDOG TIMER
Clock output/buzzer output Operable (Operation is disabled while in the low consumption RTC mode (when the RTCLPC
bit of the OSMC register is 1))
A/D converter Operation disabled
Serial array unit (SAU) Operable (Operation is disabled while in the low consumption RTC mode (when the RTCLPC
bit of the OSMC register is 1))
Serial interface (IICA) Operation disabled
Multiplier and divider/multiply-
accumulator
DMA controller
Operable (Operation is disabled while in the low consumption RTC mode (when the RTCLPC
bit of the OSMC register is 1))
Power-on-reset function
Voltage detection function
External interrupt
Key interrupt function
Operable
High-speed CRC Operation disabled CRC
operation
function
General-purpose
CRC
Operable
Illegal-memory access detection
function
Operation stopped
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