2.16
SEL-387-0, -5, -6 Relay Instruction Manual Date Code 20170601
Installation
Circuit Board Configuration
EIA-232 Serial Port Jumpers
Refer to Figure 2.10. Jumpers JMP1 and JMP2 are toward the rear of the main
board, near the rear-panel EIA-232 serial communications ports. These
jumpers connect or disconnect +5 Vdc to Pin 1 on the EIA-232 serial
communications SERIAL PORTS 2 and 3. SEL normally ships relays with these
jumpers removed (out of place) so that the +5 Vdc is not connected to Pin 1 on
the EIA-232 serial communications ports. JMP1 controls the +5 Vdc for
SERIAL PORT 3, and JMP2 controls the +5 Vdc for SERIAL PORT 2 (see Table 7.1).
If these jumpers are installed, be certain not to short the power supply with an
incorrect communication cable. The +5 Vdc connections supply current as
high as 1 A.
Solder jumpers JMP3 and JMP4 allow connection of an IRIG-B source to
SERIAL PORT 2. Removal of JMP3 and JMP4 will cause SERIAL PORT 2 to no
longer accept an IRIG-B signal. The SERIAL PORT 1 connector always accepts
an IRIG-B signal. SERIAL PORT 2 and SERIAL PORT 1 IRIG-B circuits are in
parallel; therefore, connect only one IRIG-B source at a time.
Condition of Acceptability for North American Product Safety
Compliance
To meet product safety compliance for end-use applications in North America,
use an external fuse rated 3 A or less in-line with the +5 Vdc source on pin 1.
SEL fiber-optic transceivers include a fuse that meets this requirement.
Other Jumpers
Additional main board jumpers JMP5A through JMP5D, located near JMP6,
are not functional in the SEL-387. Originally they were installed for
developmental testing purposes but are not used in the production version of
the relay. Jumpers must not be installed in any JMP5 position.
Low-Level Analog Interface
SEL designed the SEL-387 main board to accept low-level analog signals as
an optional testing method. Section 10: Testing and Troubleshooting contains
a more detailed discussion of the patented Low-Level Test Interface; and
Figure 10.1 shows the pin configuration. The SEL RTS (Relay Test System)
interfaces with the relay through a ribbon cable connection on the main board.
With the front panel removed, the low-level interface connector is on the front
edge at the far right of the top board. Refer to Figure 2.10. Remove the ribbon
cable from the main board (top board), and connect the SEL RTS ribbon cable
to the main board. This removes the connection from the transformers in the
bottom of the relay chassis and connects the SEL RTS system for low-level
testing. Refer to the SEL RTS Instruction Manual for system operation. For
normal operation, be sure to properly reinstall the ribbon cable that connects
the transformers in the bottom of the chassis to the main board.
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