Technical specifications
A.2 S7-200 SMART CPUs
S7-200 SMART
System Manual, V2.3, 07/2017, A5E03822230-AF
705
Expansion modules ex-
6 max. 6 max. Not available
Signal board expansion 1 max. 1 max. Not available
High-
speed
counters
Single phase 4 at 200 kHz
4 at 200 kHz
4 at 100 kHz
A/B phase 2 at 100 kHz
2 at 100 kHz
2 at 50 kHz
2
Edge interrupts 4 rising and 4 falling (6
and 6 with optional signal
4 rising and 4 falling (6
and 6 with optional signal
4 rising and 4 falling
microSDHC Card (optional)
microSDHC Card (optional)
Real time clock retention
7 days typ./6 days min.
7 days typ./6 days min.
Not available
You can configure areas of V memory, M memory, C memory (current values), and portions of T memory (current val-
ues) on retentive, up to the specified maximum amount.
The specified maximum pulse frequency is possible only for CPU models with transistor outputs. Pulse output operation
is not recommended for CPU models with relay outputs.
Table A- 40 Performance
Table A- 41 User program elements supported
POUs Type/quantity Main program: 1
Subroutines: 128 (0 to 127)
Interrupt routines: 128 (0 to 127)
Nesting depth From main program: 8 subroutine levels
From interrupt routine: 4 subroutine levels
Timers Type/quantity Non-retentive (TON, TOF): 192