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Siemens SIMODRIVE 611 universal - Page 140

Siemens SIMODRIVE 611 universal
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4
01.99
4.6 Parameters for hardware, operating mode and clock cycles
4-140
Siemens AG 2005 All Rights Reserved
SIMODRIVE 611 universal Description of Functions (FBU) – 04.05 Edition
For ”SIMODRIVE 611 universal”, the clock cycles (current controller,
speed controller, position controller and interpolation clock cycles) are
set as standard, and generally do not have to be changed.
However, the speed controller dynamic performance can be further en-
hanced by reducing the clock cycle times (current controller and speed
controller clock cycles).
Note
In standard operation, use the standard clock cycle settings.
After the clock cycles have been changed, the ”calculate controller
data” function (P1080 = 1) should be executed.
Table 4-6 Clock cycle parameters
Parameters
No. Name Min. Standard Max. Units Effective
1000 Current controller clock cycle 2 4 4 31.25 µs PO
1001 Speed controller clock cycle 2 4 16 31.25 µs PO
1009 Position controller cycle 32 32 128 31.25 µs PO
1010 Interpolation clock cycle 64 128 640 31.25 µs PO
The clock cycles are derived from the basic hardware clock cycle (31.25 µs).
When changing the clock cycles, the data in the following tables and the associated limitations
must be observed.
Current Speed Position Interpolation
ctr clk cycle ctr clk cycle ctr clk cycle clock cycle
P1000 P1001 P1009 P1010
4 (125 µs) 4 (125 µs) 32 (1 ms) 128 (4 ms) Standard
2 (62.5 µs) 2 (62.5 µs) 1 ms 4 ms Possible values
4 (125 µs) 4 (125 µs) to to (also refer to
8 (250 µs) 4 ms 20 ms Limitations)
12 (500 µs) Tip: 31.25 µs 32 = 1 ms
Clock cycles
Values
Limitations:
The clock cycles for both active axes must be set the same on a control board.
Current controller clock cycle: for 2 active axes and positioning, 62.5 µs is not permissible
Speed controller clock cycle: Speed controller clock cycle Current controller clock cycle
for 2 active axes, 62.5 µs is not permissible
Position controller clock cycle: must be an integer multiple of the speed contr. clock cycle
Interpolation clock cycle: must be an integer multiple of the position contr. clock cycle
Parameters
for
clock cycles
4 Commissioning
04.99

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