STR-DA2800ES
163
NETWORK BOARD IC2501 IP175DLF (ETHERNET INTERFACE)
Pin No. Pin Name I/O Description
1 AVCC - Power supply terminal (+1.8V)
2 NC I Not used
3, 4 TXOP0, TXOM0 O Digital data output terminal Not used
5 AGND - Ground terminal
6 AVCC - Power supply terminal (+1.8V)
7 AGND - Ground terminal
8, 9 TXOP1, TXOM1 O Digital data output to the LAN connector for 4
10 AVCC - Power supply terminal (+1.8V)
11, 12 RXIP1, RXIM1 I Digital audio/video signal input from the LAN connector for 4
13 AGND - Ground terminal
14 AVCC - Power supply terminal (+1.8V)
15 BGRES O Band gap resister connection terminal Fixed at “L” in this unit
16, 17 AGND - Ground terminal
18, 19 RXIP2, RXIM2 I Digital audio/video signal input from the LAN connector for 3
20 AVCC - Power supply terminal (+1.8V)
21, 22 TXOP2, TXOM2 O Digital data output to the LAN connector for 3
23 AGND - Ground terminal
24 AVCC - Power supply terminal (+1.8V)
25 AGND - Ground terminal
26, 27 TXOP3, TXOM3 O Digital data output to the LAN connector for 2
28 AVCC - Power supply terminal (+1.8V)
29 RXIP3, RXIM3 I Digital audio/video signal input from the LAN connector for 2
31, 32 AGND - Ground terminal
33, 34 RXIP4, RXIM4 I Digital audio/video signal input from the LAN connector for 1
35 AVCC - Power supply terminal (+1.8V)
36 LOW_10M_EN I Low power mode setting terminal Fixed at “L” in this unit
37, 38 TXOP4, TXOM4 O Digital data output to the LAN connector for 1
39 AGND - Ground terminal
40 AVCC - Power supply terminal (+1.8V)
41 TB_MII0_EN I Not used
42 HWIGMP_EN I Not used
43, 44 CRS1, CRS0 I Not used
45 GND - Ground terminal
46, 47 VCC - Power supply terminal (+1.8V)
48, 49 GND - Ground terminal
50 VCC - Power supply terminal (+1.8V)
51 MII1_DIS I Not used
52 TEST2 I Not used
53 RMII_EN SCL I/O Not used
54 MII1_PHY_MODE I/O Not used
55 VCC - Power supply terminal (+1.8V)
56 GND - Ground terminal
57 TXEN1 I/O Not used
58 RMII1_CLK_OUT I/O Not used
59 to 61 TXD1_2 to TXD1_0 I/O Not used
62 MII_TXCLK I/O Not used
63 COS_EN I/O Not used
64 HPPS_EN I/O Not used
65 to 67 RXD1_2 to RXD1_0 I/O Not used
68 MII1_RXCLK I/O Not used
69 COL1 I/O Not used
70 MDIO0 I/O Two-way management data bus with the audio/video signal decoder
71 MDC0 I Management data clock signal input from the audio/video signal decoder
72 VCC_O_2 - Power supply terminal (+3.3V)
73 GND_O_2 - Ground terminal
74 P4EXT MDIO1 I Not used
75 P4MII_SNI I Not used
76 TXEN0 I Enable signal input from the audio/video signal decoder
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