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2-4
91390
QUBE
S ETUP
Figure 2-1 Voltage test points on pod connector
SDLC I/O Connector - DB9
Female
The Flexport SDLC I/O connector is on the back panel. The SDLC
clock frequency is approximately 2 MHz. Docked, (P506) becomes
the SDLC I/O. This interface is electrically compatible with the EIA-
RS485/RS422 standard. The communications protocol is derived
from the IBM Synchronous Data Link Control specification, and uses
its Non-Switched Multipoint Half-Duplex configuration. This
interface is compatible with all of Spacelabs Healthcare Flexports.
The CPU board always provides the SDLC clock. The SDLC clock
frequency is 3.7847 MHz ±100 ppm. The pinout for this connector is
as follows:
Table 2-2 Pinout for external SDLC connector
Pin # Function Image
PIN 1 RTN
PIN 2 SDLC DATA +
PIN 3 SDLC DATA -
PIN 4 + 5V
PIN 5 + 12V
PIN 6 SDLC CLK +
PIN 7 SDLC CLK -
PIN 8 -12V
PIN 9 RTN
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