Reset and clock control (RCC)
ï€ RCC_AHBPeriph_GPIOB :
ï€ RCC_AHBPeriph_GPIOC :
ï€ RCC_AHBPeriph_GPIOD :
ï€ RCC_AHBPeriph_GPIOE :
ï€ RCC_AHBPeriph_GPIOF :
ï€ RCC_AHBPeriph_TS :
ï€ RCC_AHBPeriph_CRC :
ï€ RCC_AHBPeriph_FLITF :
ï€ RCC_AHBPeriph_SRAM :
ï€ RCC_AHBPeriph_DMA2 :
ï€ RCC_AHBPeriph_DMA1 :
ï€ RCC_AHBPeriph_ADC34 :
ï€ RCC_AHBPeriph_ADC12 :
ï‚· NewState : new state of the specified peripheral clock. This
parameter can be: ENABLE or DISABLE.
ï‚· After reset, the peripheral clock (used for registers read/write
access) is disabled and the application software has to enable
this clock before using it.
18.2.8.11 RCC_APB2PeriphClockCmd
void RCC_APB2PeriphClockCmd ( uint32_t RCC_APB2Periph,
FunctionalState NewState)
Enables or disables the High Speed APB (APB2) peripheral clock.
ï‚· RCC_APB2Periph : specifies the APB2 peripheral to gates
its clock. This parameter can be any combination of the
following values:
ï€ RCC_APB2Periph_SYSCFG :
ï€ RCC_APB2Periph_SPI1 :
ï€ RCC_APB2Periph_USART1 :
ï€ RCC_APB2Periph_TIM15 :
ï€ RCC_APB2Periph_TIM16 :
ï€ RCC_APB2Periph_TIM17 :
ï€ RCC_APB2Periph_TIM1 :
ï€ RCC_APB2Periph_TIM8 :
ï‚· NewState : new state of the specified peripheral clock. This
parameter can be: ENABLE or DISABLE.
ï‚· After reset, the peripheral clock (used for registers read/write
access) is disabled and the application software has to enable
this clock before using it.