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TECO JSDG2S Series - Page 73

TECO JSDG2S Series
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2-34
CN8 Full-closed loop signal terminal configuration diagram: (Only for JSDG2S, JSDG2S-E,
JSDG2S-L)
Pin Name
1 +5V
2 0V
3 A
4 /A
5 B
6 /B
7 Z
8 /Z
CN8 Full-closed loop signal terminal configuration diagram: (Only for JSDG2S-EL)
Pin Name
1 +5V
2 0V
3 A
4 /A
5 B
6 /B
7 Z
8 /Z
Note 1: Support encoder of A/B phase signal and 5V voltage only.
Note 2: Maximum resolution for encoder support is 1000000 pulse/rev (pulse equals to the
corresponded full-closed loop 4-time maximum when the motor rotates 1 cycle).

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