REG 316*4 1MRB520049-Uen / Rev. E ABB Switzerland Ltd
9-1
March 01
9. INTERBAY BUS (IBB) INTERFACE
9.1. Connection to a station control system ....................................9-3
9.2. Setting the IBB/RIO function .................................................... 9-4
9.3. Transferring disturbance recorder data via the IBB ................. 9-9
9.4. Synchronisation ..................................................................... 9-11
9.5. SPA bus address format........................................................9-11
9.5.1. Masking events...................................................................... 9-12
9.6. SPA address list ....................................................................9-13
9.6.1. Channel 0 .............................................................................. 9-13
9.6.2. Channel 0 event list ............................................................... 9-14
9.6.3. Channel 1 event list ............................................................... 9-14
9.6.4. Channel 3 event list ............................................................... 9-14
9.6.5. Channel 4 event list ............................................................... 9-15
9.6.6. Channel 4 analogue input...................................................... 9-15
9.6.7. Binary input signals................................................................ 9-15
9.6.8. IBB input signals .................................................................... 9-16
9.6.9. Binary output signals..............................................................9-17
9.6.10. Tripping signals...................................................................... 9-17
9.6.11. LED signals............................................................................ 9-17
9.6.12. IBB output signals.................................................................. 9-18
9.6.13. IBB output signal event masks............................................... 9-19
9.6.14. Binary input event masks....................................................... 9-21
9.6.15. Hardware ...................................... 35.................................... 9-22
9.6.16. Channel 8 system I/O’s................. 34.................................... 9-23
9.6.17. IBB I/O .......................................... 43....................................9-25
9.6.18. Current-DT...................................... 2....................................9-26
9.6.19. Current............................................ 3.................................... 9-27
9.6.20. Diff-Transf ....................................... 4.................................... 9-28
9.6.21. Underimped .................................... 5.................................... 9-31
9.6.22. MinReactance................................. 6....................................9-32
9.6.23. NPS-DT .......................................... 7....................................9-33
9.6.24. NPS-Inv ........................................ 11....................................9-34
9.6.25. Voltage.......................................... 12.................................... 9-35
9.6.26. Current-Inv.................................... 13.................................... 9-36
9.6.27. OLoad-Stator ................................ 14....................................9-37
9.6.28. OLoad-Rotor ................................ 15.................................... 9-38