344 Rockwell Automation Publication 1766-UM001I-EN-P - June 2015
Appendix F MicroLogix 1400 Distributed Network Protocol (DNP3)
20 1 Counter - 32-bit with flag
7 (freeze)
8 (freeze noack)
9 (freeze clear)
10 (frz. cl. noack)
06 (no range, or all)
20 2 Counter - 16-bit with flag 1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
20 2 Counter - 16-bit with flag
7 (freeze)
8 (freeze noack)
9 (freeze clear)
10 (frz. cl. noack)
06 (no range, or all)
20 5 Counter - 32-bit without flag 1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
20 5 Counter - 32-bit without flag 7 (freeze)
8 (freeze noack)
9 (freeze clear)
10 (frz. cl. noack)
06 (no range, or all)
20 6 Counter - 16-bit without flag
1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
20 6 Counter - 16-bit without flag 7 (freeze)
8 (freeze noack)
9 (freeze clear)
10 (frz. cl. noack)
06 (no range, or all)
21 0 Frozen Counter - Any Variation 1 (read) 00, 01 (start-stop)
06 (no range, or all)
21 1 Frozen Counter - 32-bit with flag
1 (read) 06 (no range, or all) 129 (response) 00, 01 (start-stop)
21 2 Frozen Counter - 16-bit with flag 1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
21 5 Frozen Counter - 32-bit with flag
and time
1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
21 6 Frozen Counter - 16-bit with flag
and time
1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
21 9 Frozen Counter - 32-bit without
flag
1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
21 10 Frozen Counter - 16-bit without
flag
1 (read) 00, 01 (start-stop)
06 (no range, or all)
129 (response) 00, 01 (start-stop)
22 0 Counter Event - Any Variation 1 (read) 06 (no range, or all)
07, 08 (limited qty)
22 1 Counter Event - 32-bit with flag
1 (read) 06 (no range, or all)
07, 08 (limited qty)
129 (response)
130 (unsol. resp)
17, 28 (index)
22 2 Counter Event - 16-bit with flag 1 (read) 06 (no range, or all)
07, 08 (limited qty)
129 (response)
130 (unsol. resp)
17, 28 (index)
22 5 Counter Event - 32-bit with flag
and time
1 (read) 06 (no range, or all)
07, 08 (limited qty)
129 (response)
130 (unsol. resp)
17, 28 (index)
22 6 Counter Event - 16-bit with flag
and time
1 (read) 06 (no range, or all)
07, 08 (limited qty)
129 (response)
130 (unsol. resp)
17, 28 (index)
23 0 Frozen Counter Event - Any
Variation
1 (read) 06 (no range, or all)
07, 08 (limited qty)
Implementation Table for Series B controllers
DNP Object Group & Variation Request
DNP3 Master may issue
MicroLogix 1400 must parse
Response
DNP3 Master must parse
MicroLogix 1400 may issue
Group
Num
Var Num Description Function Codes
(dec)
Qualifier Codes (hex) Function Codes
(dec)
Qualifier Codes
(hex)