Analog Devices AD9361 User Manual

UG-570 AD9361 Reference Manual
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ADDITIONAL INTERFACE SIGNALS
CLOCK_OUT
CLOCK_OUT is an output signal designed to be used as a
master clock source for the BBP. This output can be
programmed to be a buffered version of the input clock or a
multiple of the Rx data path ADC clock. Note that the clock
frequency must always be less than 61.44 MHz.
CTRL_IN[3:0]
The CTRL_IN pins are four programmable input signals used
for real time control Rx gain settings as described in the Gain
Control section.
CTRL_IN2 can also be used to provide hardware control in the
receiver AGC hybrid mode. In this mode, gain changes occur
when the BBP pulls the CTRL_IN2 pin high. This allows the
BBP to directly control the time that the gain setting changes.
CTRL_OUT[7:0]
The CTRL_OUT pins are eight programmable digital output
signals used for real time processing. These outputs include
internally generated functions and status bits such as PLL lock,
calibration complete, and AGC functions.
EN_AGC
EN_AGC is an input signal that provides real time control of
when the AGC is active. When pulled high, the EN_AGC pin
forces the AGC to unlock so that adjustments to the gain setting
can be made. If the EN_AGC pin is not used, then the Gain
Lock Delay bit must be set high.
GPO[3:0]
The GPO pins are digital outputs that can be configured to
monitor the status of the ENSM or serve as general-purpose
logic outputs. These pins are especially useful for biasing a
connected power amplifier or controlling front-end switches
used in TDD systems. See the General Purpose Output Control
section for more detail.
RESETB
RESETB is an input signal allowing asynchronous hardware
reset of the AD9361. A logic low applied to this pin resets the
device (all SPI registers are reset to default settings and the
device is placed in SLEEP mode). The RESETB line should be
held low for at least 1 µs, and the device should not be
programmed for at least 1 µs after the RESETB line has been
taken back high.
SYNC_IN
SYNC_IN is a logic input that can be used to provide
synchronization between the data ports of multiple AD9361
devices. See the Baseband Synchronization section for more
details.
Rev. A

Analog Devices AD9361 Specifications

General

Brand	Analog Devices
Model	AD9361
Category	Motherboard
Language	English