258
2467S–AVR–07/09
ATmega128
Figure 126. Additional Scan Signal for the Two-wire Interface
Scanning the RESET
Pin
The RESET pin accepts 5V active low logic for standard Reset operation, and 12V active high
logic for High Voltage Parallel programming. An observe-only cell as shown in Figure 127 is
inserted both for the 5V Reset signal; RSTT, and the 12V Reset signal; RSTHV.
Figure 127. Observe-only Cell
Scanning the Clock
Pins
The AVR devices have many clock options selectable by fuses. These are: Internal RC Oscilla-
tor, External RC, External Clock, (High Frequency) Crystal Oscillator, Low-frequency Crystal
Oscillator, and Ceramic Resonator.
Figure 128 shows how each Oscillator with external connection is supported in the scan chain.
The Enable signal is supported with a general boundary-scan cell, while the Oscillator/Clock out-
put is attached to an observe-only cell. In addition to the main clock, the Timer Oscillator is
scanned in the same way. The output from the internal RC Oscillator is not scanned, as this
Oscillator does not have external connections.
Pxn
PUExn
ODxn
IDxn
TWIEN
OCxn
Slew-rate limited
SRC
0
1
DQ
From
previous
cell
ClockDR
ShiftDR
To
next
cell
From system pin
To system logic
FF1
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