87
2467S–AVR–07/09
ATmega128
Register
Description for I/O
Ports
Port A Data Register –
PORTA
Port A Data Direction
Register – DDRA
Port A Input Pins
Address – PINA
Port B Data Register –
PORTB
Port B Data Direction
Register – DDRB
Port B Input Pins
Address – PINB
Port C Data Register –
PORTC
Port C Data Direction
Register – DDRC
Bit 76543210
PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 PORTA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 DDRA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 7 6543210
PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 PINA
Read/WriteR RRRRRRR
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A
Bit 76543210
PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 PORTB
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 DDRB
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
PINB7 PINB6 PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 PINB
Read/WriteRRRRRRRR
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A
Bit 76543210
PORTC7 PORTC6 PORTC5 PORTC4 PORTC3 PORTC2 PORTC1 PORTC0 PORTC
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
DDC7 DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 DDRC
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000