APPENDIX B
POST Error Codes
This appendix contains the following topics:
• FPGA Power Sequence and Error Codes, on page 65
• Agesa POST Codes, on page 67
• BIOS POST Codes, on page 82
FPGA Power Sequence and Error Codes
Table 2: Power-Up Error Conditions
DescriptionLED Code
LTPI PHY aligned10
FM_HPM_STBY_EN (LTPI Link-Up)11
BMC Ready12
CPU0 Not Present13
PWRGD_CPU_PVDD3V3_STBY14
PWRGD_CPU0_PVDD1V8_STBY15
PWRGD_CPU1_PVDD1V8_STBY16
FM_HPM_STBY_RST17
PWRGD_PSU1_PWROK18
PWRGD_PSU2_PWROK19
PWRGD_P3V321
PWRGD_GPU_P54V (provided by HIB)22
PWRGD_PVDD1V1_P031
PWRGD_PVDDIO_P032
Cisco UCS C885A M8 Server Installation and Service Guide
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