Figure 7-4: Example iMPACT Boundary Scan
7. If the cable is connected correctly, the application will connect and a Xilinx chip
chain will be shown. If the cable is not connected correctly, a cable connection
warning is given. The full chain should show two devices, as shown in the
example figure below.
Figure 7-5: Example Xilinx chip chain
8. The Assign New Configuration File dialog asks you to select an FPGA image
for the first device in the chain or to bypass that device.