Curtis 1232E/34E/36E/38E & 1232SE/34SE/36SE Manual, os30
24 NOVEMBER 2015
APPENDIX B: EN13849 COMPLIANCE
B-1
APPENDIX B
EN13849 COMPLIANCE
Since January 1, 2012, conformance to the European Machinery Directive
has required that the Safety Related Parts of the Control System (SRPCS)
be designed and veried upon the general principles outlined in EN13849.
EN13849 supersedes the EN954 standard and expands upon it by requiring
the determination of the safety Performance Level (PL) as a function of Desig-
nated Architecture plus Mean Time To Dangerous Failure (MTTFd), Common
Cause Faults (CCF), and Diagnostic Coverage (DC). ese gures are used by
the OEM to calculate the overall PL for each of the safety functions of their
vehicle or machine.
e OEM must determine the hazards that are applicable to their vehicle
design, operation, and environment. Standards such as EN13849-1 provide
guidelines that must be followed in order to achieve compliance. Some indus-
tries have developed further standards (called type-C standards) that refer to
EN13849 and specically outline the path to regulatory compliance. EN1175-1
is a type-C standard for battery-powered industrial trucks. Following a type-C
standard provides a presumption of conformity to the Machinery Directive.
Curtis Enhanced AC Motor Controllers comply with these directives
using advanced active supervisory techniques. e basic “watchdog” test circuits
have been replaced with a Supervisor microcontroller that continuously tests
the safety related parts of the control system; see the simplied block diagram
in Figure B-1.
Fig. B-1 Supervisory
system in Curtis enhanced
AC motor controllers.
⇐
⇐
PRIMARY MOTOR CONTROL
MICROPROCESSOR
SUPERVISOR
MICROPROCESSOR
POWERBASE
DRIVERS
AC
MOTOR
Communication
Link
Inputs
Outputs
Shutdown
Monitor
Monitor
e Supervisor and Primary motor control processors run diagnostic
checks at startup and continuously during operation. At startup, the integrity
of the code and EEPROM are ensured through CRC checksum calculations.
RAM is pattern checked for proper read, write, and addressing. During opera-
tion, the arithmetic and logic processing unit of each micro is cyclically tested
through dynamic stimulus and response. e operating system timing and
task sequencing are continuously veried. Redundant input measurements are
crosschecked over 30 times per second, and operational status information is
passed between microprocessors to keep the system synchronized. Any faults
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