MC68332 REGISTER SUMMARY
USER’S MANUAL D-35
D.5.11 HSQR0 — Host Sequence Register 0 $YFFE14
D.5.12 HSQR1 — Host Sequence Register 1 $YFFE16
CH[15:0] — Encoded Host Sequence
The host sequence field selects the mode of operation for the time function selected
on a given channel. The meaning of the host sequence bits depends on the time func-
tion specified.
D.5.13 HSRR0 — Host Service Request Register 0 $YFFE18
D.5.14 HSRR1 — Host Service Request Register 1 $YFFE1A
CH[15:0] — Encoded Type of Host Service
The host service request field selects the type of host service request for the time func-
tion selected on a given channel. The meaning of the host service request bits de-
pends on the time function specified.
A host service request field cleared to %00 signals the host that service is completed
by the microengine on that channel. The host can request service on a channel by writ-
ing the corresponding host service request field to one of three nonzero states. The
CPU should monitor the host service request register until the TPU clears the service
request to %00 before the CPU changes any parameters or issues a new service re-
quest to the channel.
1514131211109876543210
CH 15 CH 14 CH 13 CH 12 CH 11 CH 10 CH 9 CH 8
RESET:
0 000000000000000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CH 7 CH 6 CH 5 CH 4 CH 3 CH 2 CH 1 CH 0
RESET:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1514131211109876543210
CH 15 CH 14 CH 13 CH 12 CH 11 CH 10 CH 9 CH 8
RESET:
0 000000000000000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CH 7 CH 6 CH 5 CH 4 CH 3 CH 2 CH 1 CH 0
RESET:
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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Freescale Semiconductor, Inc.
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