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8.3 Introduction for the GP-IB
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Standard Event Status Register Bit Assignments
Bit 7 PON
Power in flag.
When the power is turned on, or on recovery from a power cut,
this bit is set to 1.
Bit 6 URQ
User request.
Not used by the 3227.
Bit 5 CME
Command error (ignores the command until get the message
terminator).
When a command which has been received contains a syntactic
or semantic error, this bit is set to 1.
The command is not supported by the 3227.
There is a mistake in a program header.
The number of data parameters is wrong.
The format of the parameters is wrong.
Bit 4 EXE
Execution error.
When a command which has been received cannot be executed
for some reason, this bit is set to 1.
The designated data value is outside of the set range.
The designated data value is not acceptable.
Bit 3 DDE
Device dependent error.
When a command cannot be executed due to some cause other
than a command error, a query error, or an execution error, thi
bit is set to 1.
Execution is impossible due to some abnormality inside the
3227.
Execution is impossible because some other function is being
performed.
Bit 2 QYE
Query error (clears the output queue).
This bit is set to 1 when a query error is detected by the output
queue control.
When an attempt has been made to read the output queue
when it is empty.
When the response message exceeds 400 bytes.
When next message is received with containing some data in
the output queue.
When, on the same line, a query occurs after an "＊IDN?"
query.
Bit 1 RQC
Request for controller authority.
Not used by the 3227.
Bit 0 OPC
Operation terminated.
This bit is set to 1 when an "＊OPC" command is executed.
When the operation of all the messages up to the "＊
OPC"command has been completed.
(2) Standard event status enable register (SESER)
When each bit of the standard event status enable register is set to 1, the
corresponding bit of the standard event status register becomes able to be
accessed.
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