Intel Altera MAX 10 FPGA - Page 52

Board
Reference
(J2)
Schematic Signal Name I/O Standard MAX
10/MAX II
Pin Number
Description
110
HSMC_RX_D_N9
(1)
2.5 V CMOS inout or
LVDS RX channels-n
AA14 Data bus
113
HSMC_TX_D_P10
2.5 V CMOS inout or
LVDS TX channels-p
V16 Data bus
114
HSMC_RX_D_P10
(1)
2.5 V CMOS inout or
LVDS RX channels-p
Y16 Data bus
115
HSMC_TX_D_N10
2.5 V CMOS inout or
LVDS TX channels-n
U15 Data bus
116
HSMC_RX_D_N10
(1)
2.5 V CMOS inout or
LVDS RX channels-n
AA15 Data bus
119
HSMC_TX_D_P11
2.5 V CMOS inout or
LVDS TX channels-p
W16 Data bus
120
HSMC_RX_D_P11
(1)
2.5 V CMOS inout or
LVDS RX channels-p
AA16 Data bus
121
HSMC_TX_D_N11
2.5 V CMOS inout or
LVDS TX channels-n
V15 Data bus
122
HSMC_RX_D_N11
(1)
2.5 V CMOS inout or
LVDS RX channels-n
AB16 Data bus
125
HSMC_TX_D_P12
2.5 V CMOS inout or
LVDS TX channels-p
V17 Data bus
126
HSMC_RX_D_P12
(1)
2.5 V CMOS inout or
LVDS RX channels-p
AB18 Data bus
127
HSMC_TX_D_N12
2.5 V CMOS inout or
LVDS TX channels-n
W17 Data bus
128
HSMC_RX_D_N12
(1)
2.5 V CMOS inout or
LVDS RX channels-n
AB17 Data bus
131
HSMC_TX_D_P13
2.5 V CMOS inout or
LVDS TX channels-p
V12 Data bus
132
HSMC_RX_D_P13
(1)
2.5 V CMOS inout or
LVDS RX channels-p
Y11 Data bus
133
HSMC_TX_D_N13
2.5 V CMOS inout or
LVDS TX channels-n
V11 Data bus
134
HSMC_RX_D_N13
(1)
2.5 V CMOS inout or
LVDS RX channels-n
W11 Data bus
137
HSMC_TX_D_P14
2.5 V CMOS inout or
LVDS TX channels-p
P12 Data bus
138
HSMC_RX_D_P14
(1)
2.5 V CMOS inout or
LVDS RX channels-p
AB11 Data bus
139
HSMC_TX_D_N14
2.5 V CMOS inout or
LVDS TX channels-n
R12 Data bus
140
HSMC_RX_D_N14
(1)
2.5 V CMOS inout or
LVDS RX channels-n
AB10 Data bus
143
HSMC_TX_D_P15
2.5 V CMOS inout or
LVDS TX channels-p
AA12 Data bus
144
HSMC_RX_D_P15
(1)
2.5 V CMOS inout or
LVDS RX channels-p
AB13 Data bus
continued...
A. Development Kit Components
683460 | 2024.11.20
MAX
®
10 FPGA Development Kit User Guide
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