Mitsubishi Electric Q173DSCPU - Page 16

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5.5.3 Bit logical OR : | ................................................................................................................................. 5-22
5.5.4 Bit exclusive logical OR : ^ ................................................................................................................ 5-23
5.5.5 Bit right shift : >> ................................................................................................................................ 5-24
5.5.6 Bit left shift : << .................................................................................................................................. 5-25
5.5.7 Sign inversion (Complement of 2) :
.............................................................................................. 5-26
5.6 Standard Functions .................................................................................................................................. 5-27
5.6.1 Sine : SIN ........................................................................................................................................... 5-27
5.6.2 Cosine : COS..................................................................................................................................... 5-28
5.6.3 Tangent : TAN ................................................................................................................................... 5-29
5.6.4 Arcsine : ASIN ................................................................................................................................... 5-30
5.6.5 Arccosine : ACOS ............................................................................................................................. 5-31
5.6.6 Arctangent : ATAN ............................................................................................................................ 5-32
5.6.7 Square root : SQRT .......................................................................................................................... 5-33
5.6.8 Natural logarithm : LN ....................................................................................................................... 5-34
5.6.9 Exponential operation : EXP ............................................................................................................. 5-35
5.6.10 Absolute value : ABS ...................................................................................................................... 5-36
5.6.11 Round-off : RND .............................................................................................................................. 5-37
5.6.12 Round-down : FIX ........................................................................................................................... 5-38
5.6.13 Round-up : FUP .............................................................................................................................. 5-39
5.6.14 BCD
BIN conversion : BIN ......................................................................................................... 5-40
5.6.15 BIN
BCD conversion : BCD ........................................................................................................ 5- 41
5.7 Type Conversions .................................................................................................................................... 5-42
5.7.1 Signed 16-bit integer value conversion : SHORT ............................................................................ 5-42
5.7.2 Unsigned 16-bit integer value conversion : USHORT ..................................................................... 5-43
5.7.3 Signed 32-bit integer value conversion : LONG ............................................................................... 5-45
5.7.4 Unsigned 32-bit integer value conversion : ULONG ........................................................................ 5-46
5.7.5 Signed 64-bit floating-point value conversion : FLOAT ................................................................... 5-48
5.7.6 Unsigned 64-bit floating-point value conversion : UFLOAT............................................................. 5-49
5.7.7 Floating-point value conversion 32-bit into 64-bit : DFLT ................................................................ 5-50
5.7.8 Floating-point value conversion 64-bit into 32-bit : SFLT ................................................................ 5-51
5.8 Bit Device Statuses .................................................................................................................................. 5-53
5.8.1 ON (Normally open contact) : (None) ............................................................................................... 5-53
5.8.2 OFF (Normally closed contact) : ! ..................................................................................................... 5-54
5.9 Bit Device Controls ................................................................................................................................... 5-55
5.9.1 Device set : SET ................................................................................................................................ 5-55
5.9.2 Device reset : RST ............................................................................................................................ 5-57
5.9.3 Device output : DOUT ....................................................................................................................... 5-59
5.9.4 Device input : DIN ............................................................................................................................. 5-60
5.9.5 Bit device output : OUT ..................................................................................................................... 5-61
5.10 Logical Operations ................................................................................................................................. 5-62
5.10.1 Logical acknowledgement : (None) ................................................................................................ 5-62
5.10.2 Logical negation : ! .......................................................................................................................... 5-63
5.10.3 Logical AND : * ................................................................................................................................ 5-64
5.10.4 Logical OR : + .................................................................................................................................. 5-65
5.11 Comparison Operations ......................................................................................................................... 5-66
5.11.1 Equal to : == .................................................................................................................................... 5-66
5.11.2 Not equal to : != ............................................................................................................................... 5-67
5.11.3 Less than : < .................................................................................................................................... 5-68
5.11.4 Less than or equal to : <= ............................................................................................................... 5-69