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Neoway N715-EA - Power Supply PCB Layout Guidelines

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N715-EA Hardware User Guide
Chapter 5 Application Interfaces
Copyright © Neoway Technology Co., Ltd. All rights reserved.
32
Figure 5-5 Recommended design 4
VIN
C5
100uF
C6
0.1uF
C7
100pF
C8
33pF
VBAT
EN
GND
BOOST
SW
PWR_EN
VIN
C1
100uF
C2
22uF
R1
P-PAD
FB
C3
0.1uF
0.1uF
L1
3.3uH
R2
D1
TVS
C4
When there is a big difference between the system power input and VBAT, it is recommended to
select the DC-DC step-down chip, and its maximum output current should be at least 3 A.
In order to protect the back-end components and the module, place the TVS (D1) close to the
power input interface to suppress the surge voltage before it enters back-end circuits.
Keep the placement of C5 close to the module. A large tantalum electrolytic capacitor (220 μF or
100 μF) or aluminum electrolytic capacitor (470 μF or 1000 μF) can be selected at C5 to improve
the instantaneous large current freewheeling ability of the power supply. Its withstand voltage
should be larger than 2 times the voltage of the power supply.
Keep the bypass capacitors (C6, C7, C8) of low-ESR close to the module to filter out high-
frequency jamming from the power supply.
When the module fails to shut down normally due to abnormality, it is recommended to cut off the power first to
shut down the module, and then power up again to restart the module.
PCB Layout
An ESR capacitor must be placed at the output end of the power supply to suppress the peak current.
In order to protect back-end devices, a TVS diode should be placed at the power input end to suppress
voltage spikes. The circuit design is important, and the device layout and routing are equally important.
Several key points in power supply design are summarized below:
The TVS diode can absorb instantaneous high-power pulses and withstand instantaneous pulse
current peaks up to tens or even hundreds of amperes. The clamp response time is extremely
short. Keep the TVS diode as close as possible to the power input to ensure that the surge
voltage can be clamped before the pulse is coupled to the adjacent PCB wires.
The bypass capacitor must be placed close to the power supply pin of the module to filter out
high-frequency noise signals in the power supply.

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