Neoway N715-EA - SDCard Signal Multiplexing

N715-EA Hardware User Guide
Chapter 5 Application Interfaces
Copyright © Neoway Technology Co., Ltd. All rights reserved.
48
⚫
Traces should be of equal length on each differential pair to minimize EMI and jitter. The DATA
traces (DATA [0-3]) should be matched in length to within 0.5 mm, and the CMD, CLK and DATA
traces should be matched in length to within 0.5 mm.
⚫
Spacing between DATA traces should be larger than 2 times trace width.
⚫
Control the impedance for each SDIO trace to 50 Ω.
⚫
Keep SDIO traces far away from the RF, analog, clock, and DC-DC signals.
5.3.5 SDCard (Signal Multiplexing)
Signal
Pin
I/O
Signal multiplexing
Remarks
VDD_SDCPULL
133
PO
SD card IO power supply
Pull-up power supply of SDIO
It cannot used to furnish power
for the SD card.
Leave this pin open if unused.
SDIO1_CLK
132
DO
SDIO1 clock
-
UART1_DCD
48
DO
SDIO1_CMD
-
UART1_DTR
39
B
SDIO1_DATA0
-
UART1_RI
40
B
SDIO1_DATA1
-
WAKEUP_IN
49
B
SDIO1_DATA2
-
AP_READY
50
B
SDIO1_DATA3
-
I2C_SDA
56
B
SDIO1_DET
-
SD interface supports 1.8 V/3.0 V dual voltages and a maximum clock frequency of 33.33 MHz. The
following shows the reference design of the SDC interface.