Neoway N715-EA - SPI and I2 C Interface Overview

N715-EA Hardware User Guide
Chapter 5 Application Interfaces
Copyright © Neoway Technology Co., Ltd. All rights reserved.
51
The 1.8 V SPI interface supports only master mode and frequencies up to 50 MHz. The following figure
shows the reference design of the SPI interface.
Figure 5-24 SPI reference design
N715-EA Module
(Master)
MOSI
MISO
CLK
CS
Device
(Slave)
SPI_MISO
SPI_MOSI
SPI_CS_N
SPI_CLK
5.3.8 I2C
Signal
Pin
I/O
Function description
Remarks
I2C_SDA
56
B
I2C data
It must be connected to a
pull-up resistor (1.8 kΩ is
recommended) to
VDD_1P8.
I2C_SCL
57
DO
I2C clock
N715-EA provides one 1.8 V I2C interface, supporting only master mode and speed rates up to 3.4
Mbps. The following shows the reference design of the I2C interface.
Figure 5-25 I2C reference design
I2C_SCL
N715-EA module
(Master)
I2C_SDA
SCL
SDA
(Slave)
Device
VDD_1P8
1.8kΩ
1.8kΩ