Table of Figures
Figure 2-1 Block diagram ................................................................................................................. 12
Figure 4-1 N715-EA pad lay-out (top view) ...................................................................................... 16
Figure 5-1 Voltage drops of the power supply. ................................................................................. 29
Figure 5-2 Recommended design 1 ................................................................................................. 30
Figure 5-3 Recommended design 2 ................................................................................................. 30
Figure 5-4 Recommended design 3 ................................................................................................. 31
Figure 5-5 Recommended design 4 ................................................................................................. 32
Figure 5-6 Reference design of power-on controlled by a button .................................................... 34
Figure 5-7 Reference design of power-on controlled by an MCU .................................................... 35
Figure 5-8 Power-on process ........................................................................................................... 35
Figure 5-9 Reference design of automatic power-on once powered-up .......................................... 36
Figure 5-10 Hard power-off process ................................................................................................ 37
Figure 5-11 Reference design for reset by using a button ............................................................... 38
Figure 5-12 Reference design for reset controlled by an MCU ....................................................... 38
Figure 5-13 Reset process of the N715-EA module ........................................................................ 39
Figure 5-14 Recommended design of the USB interface ................................................................ 40
Figure 5-15 Reference design of UART interface ............................................................................ 41
Figure 5-16 Recommended voltage-level translation circuit1 .......................................................... 42
Figure 5-17 Recommended voltage-level translation circuit 2 ......................................................... 43
Figure 5-18 Recommended voltage-level translation circuit 3 ......................................................... 44
Figure 5-19 Reference design of the USIM card interface (normally closed type) .......................... 45
Figure 5-20 Reference design of the USIM card interface (normally open type) ............................ 46
Figure 5-21 Reference design of the USIM card (without hot-swap) interface ................................ 47
Figure 5-22 Reference design of the SD card interface .................................................................. 49
Figure 5-23 PCM reference design .................................................................................................. 50
Figure 5-24 SPI reference design .................................................................................................... 51
Figure 5-25 I2C reference design .................................................................................................... 51