Renesas RL78/G13 User Manual

RL78/G13 CHAPTER 29 ELECTRICAL SPECIFICATIONS
R01UH0146EJ0100 Rev.1.00 992
Sep 22, 2011
Caution The pins mounted depend on the product. Refer to 2.1.1 20-pin products to 2.1.14 128-pin products,
and 2.1.15 Pins for each product (pins other than port pins).
(TA = −40 to +85°C, 1.6 V ≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Items Symbol Conditions MIN. TYP. MAX. Unit
ILIH1
P00 to P07, P10 to P17,
P30 to P37, P40 to P47,
P50 to P57, P60 to P67,
P70 to P77, P80 to P87,
P90 to P97, P100 to P106,
P110 to P117, P120,
P125 to P127, P140 to P147
VI = EVDD0 1 μ A
ILIH2
P20 to P27, P137,
P150 to P156, RESET
V
I = VDD 1 μ A
In input port or
external clock
input
1 μ A
Input leakage
current, high
I
LIH3
P121 to P124
(X1, X2, XT1, XT2, EXCLK,
EXCLKS)
VI = VDD
In resonator
connection
10
μ A
ILIL1
P00 to P07, P10 to P17,
P30 to P37, P40 to P47,
P50 to P57, P60 to P67,
P70 to P77, P80 to P87,
P90 to P97, P100 to P106,
P110 to P117, P120,
P125 to P127, P140 to P147
V
I = EVSS0 −1 μ A
ILIL2 P20 to P27, P137, RESET VI = VSS −1 μ A
In input port or
external clock
input
−1 μ A
Input leakage
current, low
I
LIL3
P121 to P124
(X1, X2, XT1, XT2, EXCLK,
EXCLKS)
V
I = VSS
In resonator
connection
−10
μ A
On-chip pll-up
resistance
R
U
P00 to P07, P10 to P17,
P30 to P37, P40 to P47,
P50 to P57, P64 to P67,
P70 to P77, P80 to P87,
P90 to P97, P100 to P106,
P110 to P117, P120,
P125 to P127, P140 to P147
VI = EVSS0, In input port 10 20 100 kΩ
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port
pins.

Renesas RL78/G13 Specifications

General

Brand	Renesas
Model	RL78/G13
Category	Computer Hardware
Language	English