RL78/G13 CHAPTER 3 CPU ARCHITECTURE
R01UH0146EJ0100 Rev.1.00 138
Sep 22, 2011
Table 3-5. SFR List (2/5)
Manipulable Bit Range Address
Special Function Register (SFR) Name
Symbol R/W
1-bit 8-bit 16-bit
After Reset
FFF2AH Port mode register 10 PM10 R/W
√ √ −
FFH
FFF2BH Port mode register 11 PM11 R/W
√ √ −
FFH
FFF2CH Port mode register 12 PM12 R/W
√ √ −
FFH
FFF2EH Port mode register 14 PM14 R/W
√ √ −
FFH
FFF2FH Port mode register 15 PM15 R/W
√ √ −
FFH
FFF30H A/D converter mode register 0 ADM0 R/W
√ √ −
00H
FFF31H Analog input channel
specification register
ADS R/W
√ √ −
00H
FFF32H A/D converter mode register 1 ADM1 R/W
√ √ −
00H
FFF37H Key return mode register KRM R/W
√ √ −
00H
FFF38H External interrupt rising edge
enable register 0
EGP0 R/W
√ √ −
00H
FFF39H External interrupt falling edge
enable register 0
EGN0 R/W
√ √ −
00H
FFF3AH External interrupt rising edge
enable register 1
EGP1 R/W
√ √ −
00H
FFF3BH External interrupt falling edge
enable register 1
EGN1 R/W
√ √ −
00H
FFF44H TXD1/
SIO10
− √
FFF45H
Serial data register 02
−
SDR02 R/W
− −
√
0000H
FFF46H RXD1/
SIO11
− √
FFF47H
Serial data register 03
−
SDR03 R/W
− −
√
0000H
FFF48H TXD2/
SIO20
− √
FFF49H
Serial data register 10
−
SDR10 R/W
− −
√
0000H
FFF4AH RXD2/
SIO21
− √
FFF4BH
Serial data register 11
−
SDR11 R/W
− −
√
0000H
FFF50H IICA shift register 0 IICA0 R/W
− √ −
00H
FFF51H IICA status register 0 IICS0 R
√ √ −
00H
FFF52H IICA flag register 0 IICF0 R/W
√ √ −
00H
FFF54H IICA shift register 1 IICA1 R/W
− √ −
00H
FFF55H IICA status register 1 IICS1 R
√ √ −
00H
FFF56H IICA flag register 1 IICF1 R/W
√ √ −
00H
FFF64H
FFF65H
Timer data register 02 TDR02 R/W
− − √
0000H
FFF66H
TDR03L
− √
00H
FFF67H
Timer data register 03
TDR03H
TDR03 R/W
− √
√
00H
FFF68H
FFF69H
Timer data register 04 TDR04 R/W
− − √
0000H